Metal-Oxide Semiconductor Field Effect Transistors (“MOSFETS”) are a common type of power switching device. A MOSFET device includes a source region, a drain region, a channel region extending between the source and drain regions, and a gate structure provided adjacent to the channel region. The gate structure includes a conductive gate electrode layer disposed adjacent to and separated from the channel region by a thin dielectric layer. When a voltage of sufficient strength is applied to the gate structure to place the MOSFET device in an on state, a conduction channel region forms between the source and drain regions thereby allowing current to flow through the device. When the voltage that is applied to the gate is not sufficient to cause channel formation, current does not flow and the MOSFET device is in an off state.
Today's high voltage power switch market is driven by two major parameters: breakdown voltage (“BVdss”) and on-state resistance (“Rdson”). For a specific application, a minimum breakdown voltage is required, and in practice, designers typically can meet a BVdss specification. However, this is often at the expense of Rdson. This trade-off in performance is a major design challenge for manufacturers and users of high voltage power switching devices. Manufacturers of these devices typically include termination structures such as a thick field oxide together with diffused field limiting rings and channel stop regions to reduce device leakage, reduce undesirable parasitic effects, and to enhance device breakdown. These approaches address the problem of maximum electric field relaxation of a planar junction. Each termination approach possesses advantages and disadvantages, and the designer tries to minimize the negative aspects of an approach while simultaneously exploiting the positive aspects. Among these approaches, field-limiting rings are one of the least costly in regards to semiconductor device manufacturing investment, as the same diffusion step used to form the PN junction of the main device can often be used to form the field-limiting rings. These guard rings reduce the electric field curvature while relying on the drift region to block a significant amount of voltage.
Another method for reducing the maximum electric field of a planar junction is the charge balance approach in which charge balancing structures are formed in the device drift region to maintain a substantially uniform electric field within the drift region to increase the breakdown voltage of the device. A drawback with this approach is that edge termination structures in charge balance devices occupy a large area to achieve charge balance at the interface between the active region and the termination region.
Accordingly, it would be advantageous to have a semiconductor component that has a termination structure that provides a higher breakdown voltage and promotes the ability to sustain high avalanche current at the interface between the active region and the termination region and a method for manufacturing the semiconductor component. It would be of further advantage for the semiconductor component to be cost efficient to manufacture.
For simplicity of illustration and ease of understanding, elements in the various figures are not necessarily drawn to scale, unless explicitly so stated. In some instances, well-known methods, procedures, components and circuits have not been described in detail so as not to obscure the present disclosure. The following detailed description is merely exemplary in nature and is not intended to limit the disclosure of this document and uses of the disclosed embodiments. Furthermore, there is no intention to be bound by any expressed or implied theory presented in the preceding text, including the title, technical field, background, or abstract.